As the number of transistors placed on processor-chips and thus transistor density has increased, there has been an increasing need and thus emphasis put on heat and power dissipation. Previous work has focused on better power utilization through voltage scaling and other techniques. However, little work has been done to reduce hot spots by spreading heat dissipation. Part of what was lacking was feedback relating to temperature on various parts of the chip from the hardware. For the next generation chips, for example, with multiple cores per chip, the placement of threads and hence their interaction with the cache subsystem will have a significant impact on heat.
While next-generation chips may be designed to shutdown when overheating is detected, it would be desirable to have a method and system that would circumvent the overheating from happening in the first place. For instance, it would be desirable to have an operating system schedule threads in a manner that would avoid multiple threads executing at the same time on densely clustered cores or on those cores where temperature is already high or otherwise schedule threads so that heat condition on a chip is minimized. In conventional chip designs, hardware does not provide information about heat and temperature, for example, throughout the chip or related to given hardware threads. In addition, conventional operating systems are not designed to handle or consider temperature data when scheduling threads. Accordingly, what is needed is a method and system that allow hardware to consider and provide temperature information to software such as the operating system or the like, and for that software or operating system to use the temperature data when scheduling threads on execution cores.